Via stitching is very important for PCBs that deal with high power or RF components. But also in simpler designs, in general it doesn’t hurt to stitch together ground planes with generous use of vias.
Due to the way Pcbnew (the PCB editor part of KiCad) handles vias, adding extra ones to a design is a bit tricky. The UI does not directly make it possible to place a via, except when routing a track. But for via stitching that’s too cumbersome. There’s an indirect way using the duplicate tool (Ctrl+D), however that’s where the problems start and what this post is about.
This is very essential functionality for a PCB design tool, but the feature is only planned for v5. It’s a known problem, there’s an entry in the bug tracker since 2012. To properly fix this issue, the developers want to completely rework the net connectivity algorithm and that’s why it takes so long. Unfortunately this really puts a dent into the usability of an otherwise very capable tool.
On the positive side, there is some recent activity on the subject and it looks like a fix is almost ready.
Consider the following scenario: You have a 2-layer design with a ground plane on both the top and bottom copper layer. To ensure good connectivity you want to add some stitching vias. Using the duplicate tool, you make lots of clones of an existing ground via and place them all over your board.
Here’s how that might look like:
To check if everything worked, you refill all zones (B). The result looks like this:
Everything is as expected and the result looks fine. So you save your work and maybe come back the next day. Since the PCB looks quite finished now, you run DRC and then this happens:
Suddenly all manually placed vias got disassociated and are no longer connected to the ground net.
This weird behavior is due to the flawed net connectivity algorithm. Pcbnew does not directly store which net a track or via belongs to, it only stores this information for pads. To figure out which net to assign to tracks and vias, Pcbnew will follow connected tracks until it encounters a pad. The net of the pad will then be assigned to all tracks and vias connected to it.
The algorithm is flawed, because it only detects a connection when a track ends on either a pad, other track or via. If a track merely crosses another track or just goes through a pad or via, it counts as not connected. The same also applies for zones, which is what causes the problem described above.
There are multiple workarounds. The simplest is to just connect each stitching via to another track, via or pad of the desired net. This works very well and needs no additional setup, but it’s also slow and cumbersome.
In my opinion the best approach is to create a footprint with a single through hole pad, which can then be used as a via. Pads store the associated net, so they will not loose connectivity. The footprint can then be copied with the duplicate tool, which makes it very easy to add lots of vias. There’s a step-by-step guide with screenshots available for this method.
There’s a slight downside to this approach. Care must be taken when importing a new netlist into Pcbnew – the setting for extra footprints must be set to keep. This means that removed components in the schematic will not be removed automatically from the PCB. Alternatively the via footprint can also be locked, though then it can no longer be moved without an annoying warning dialog.
Fixing Broken Designs
Initially I wanted to write about my script which fixes unconnected vias by replacing them with footprints. This is the introduction for it, but since it got pretty long, the script will be described in a second post.